Memory cells of a dynamic random access memory (DRAM) generally comprise a storage capacitor for storing an electrical charge which represents information to be stored, and an access transistor which is connected with the storage capacitor. The access transistor comprises a first and a second source/drain region, a channel connecting the first and second source/drain regions as well as a gate electrode controlling an electrical current flow between the first and second source/drain regions. The transistor usually is at least partially formed in a semiconductor substrate. The gate electrode forms part of a word line, and it is electrically isolated from the channel via a gate dielectric. By addressing the access transistor via the corresponding word line, the information stored in the storage capacitor is read out. In addition, by addressing the access transistor and transmitting an information signal via a bit line, data is stored in the corresponding memory cell, which is assigned to the specific word line and bit line.
According to an implementation of the DRAM memory cell, the electrical charge is stored in a stacked capacitor, which is formed above the surface of the substrate.
For future DRAM technologies, an increased cell capacitance for high performance and low power applications is desirable. For example, the cell capacitance can be increased by increasing the height of the stacked capacitor.
A memory device further comprises a support portion which is usually disposed at the edge of the memory cell array. Circuits such as: decoders, sense amplifiers and word line drivers for activating a word line are located in the support portion. Generally, the peripheral portion of a memory device includes circuitry for addressing memory cells and for sensing and processing the signals received from the individual memory cells.
Usually, the peripheral portion is formed in the same semiconductor substrate as the individual memory cells. Hence, a manufacturing process by which the components of the memory cell and the peripheral portion can be formed simultaneously is desirable.